Call for Papers

The IPFA 2025 Call for Papers focuses on cutting-edge research in failure analysis (FA), reliability (REL), and specialized technology (ST) within integrated circuits. It invites submissions on topics such as advanced fault isolation techniques, physical and package-level failure analysis, transistor reliability, ESD, latch-up, and the integration of AI for failure detection and reliability assessments. Contributions that explore real-world case studies, non-destructive workflows, and novel approaches in semiconductor technologies are encouraged.

SUBMISSION GUIDELINES

Prospective authors are requested to submit at least a two-page abstract (including text and figures) of their previously unpublished and original research work. The two-page abstract should include the following:

Brief introduction to the background and motivation/objectives of the work.
Experimental results, analysis, and discussion.
Summary of the findings, highlighting their impact, novelty, and importance.
Supporting figures, tables, and references.

All submissions must be in English. The materials in the paper must be original and unpublished. Please work on the abstract according to the provided template on the IPFA webpage. Only electronic submissions in PDF format will be accepted.

Please limit your submission file size to 5 MB (minimum of 2 pages to a maximum of 6 pages including text and figures) and submit your abstract through the IPFA Website by 19 January 2025. For further details, please contact the Technical Program Chair / Co-Chair.

IMPORTANT DATES

Abstract Submission Deadline: 19 January 2025

Notification of Abstract Acceptance: 31 March 2025

Failure Analysis (FA) Tracks

FA1 :

Sample Preparation, Metrology and Defect Characterization: Device de-processing, Ion beam / TEM sample preparation, Metrology, Defect inspection, Test chips.

FA1 :

Sample Preparation, Metrology and Defect Characterization: Device de-processing, ion beam / TEM sample preparation, metrology, defect inspection, test chips.

FA2 :

Electrical Fault Isolation Techniques: Photon, laser and electron beam based microscopy techniques, static and tester based techniques, nanoprobing, AFP, EBAC/EBIC, next-generation backside power-rail analysis.

FA3 :

Case Studies on Fault Isolation: Application of non-destructive workflows for defect localization, die / board / system-level electrical FA, electrical characterization and nanoprobing.

FA4 :

Physical Failure Analysis Techniques: Advanced methodologies in PFA, advanced optical/ion beam approaches, plasma/laser FIB, Spectroscopy (EDX/EELS/SIMS) techniques, scanning probe microscopy, circuit-edits, de-layering recipe innovations, tomography.

FA5 :

Case Studies on Physical Failure Analysis: Die / board / system-level physical FA, workflows, defect exposure and characterization in silicon devices.

FA6 :

System, Yield Analysis, Test and Product Failure Analysis: Design for manufacturing, test diagnostics, volume and statistical analysis, construction analysis, reverse engineering, embedded BIST and DFT test and diagnosis, reliability testing, defect-oriented testing, protocol-aware testing, test-to-design feedback, mixed signal and analog tests, silicon failure debug by test and yield engineering methodologies, yield analysis and optimization.

FA7 :

Package-Level Failure Analysis: Heterogeneous integration, 2.5D/3D/SiP package FA, backside power delivery network, non-destructive analysis including magnetic/acoustic/X-ray/lock-in thermography/FTIR, TDR, EOTPR, material analysis.

FA8 :

Case Studies on Package-Level Failure Analysis: Workflows in packaging FA, defect localization, exposure and characterization in packaging, flip-chips, wire-bond, 2.5D/3D/SiP, wafer and panel analysis.

Specialized Technology (ST) Tracks

ST1 :

Circuit Design and Debug: VLSI design on analog, digital, RF, sensor, MEMS and post-silicon debug; bio-sensors, bio-electronics, RF design and validation on test chips, MEMS and MOEMS, microwave devices and 5G and 6G circuits; defective in integrated circuit (IC) design and its failure analysis.

BACK BY DEMAND

ST2 :

Hardware Security: Semi-Invasive and invasive analysis for attack of encryption system and countermeasures, die-level reverse engineering, counterfeit electronics detection, hardware Trojan localization.

ST3 :

Artificial Intelligence for Failure Analysis and Reliability: AI for FA – fault detection, visual/image analytics, pattern recognition, signal processing; machine learning for prognosis and reliability; reliability assessment for new applications (e.g., neuromorphic devices and AI accelerators).

ST4 :

High Power Electronics / Wide Bandgap Device Reliability and Failure Analysis: Reliability and FA of GaAs, GaN, SiC and Ga2O3 devices, trap-related degradation, materials-related defect characterization, process variability, III-V/Si integration and case studies of defects.

ST5 :

Optoelectronics and MEMS Device Reliability and Failure Analysis: Reliability and FA on display modules, lasers, LEDs, solar cells (silicon, CdTe, CIGS, organic materials, multi-junction, perovskite), CMOS image sensors, photodetectors, waveguides, silicon photonics, MEMS devices, flexible electronics and thermoelectrics.

Reliability (REL) Tracks

REL1 :

Transistor and Emerging Electron Devices Reliability: Gate oxide/high-κ reliability, PBTI/NBTI, dopant effects, self-heating in CMOS, GAA FET/RFSOI/HBM/stack DRAM device reliability, process and stress-induced reliability issues and variability, non-volatile memory reliability – retention, endurance and read disturb in PCRAM, RRAM, STT-MRAM, reliability and characterization of ferroelectric devices.

REL2 :

ESD, Latchup, Interconnect & Packaging Reliability: Component & system level ESD design: modeling and simulation; modeling and simulation TDDB dielectrics, electro and stress migration, cracking, corrosion, and fatigue in bond pads; reliability of 3DIC/ TSV, heterogeneous integration in SiP, thermo-mechanical stress, power, wafer warpage, wire and wafer bonding, chip-package interaction.

Submission Format

Extended abstracts and full manuscripts (minimum of 2 pages to a maximum of 6 pages including text and figures) of your original research work.

Details of extended abstract/manuscript submission, templates and other information: IPFA 2025 Manuscript Template

Abstract Submission :

21 October 2024

Abstract Submission Deadline :

19 January 2025

Notification On The Abstract Acceptance :

31 March 2025

Full Paper Submission Deadline :

28 April 2025 (https://softconf.com/p/ipfa2025/)

For enquiries relating to the abstract and paper submission, please contact Prof. Dr. Ahmad Rifqi Md Zain ( rifqi@ukm.edu.my), Dr. Pok Fen Wei (FenWei.Pok@wdc.com), and Ms. Bernice Zee (bernice.zee@amd.com).

For all other general enquiries, please contact the secretariat (ipfasecretariat@usm.my).